1. Field of Invention
The present invention relates to an inverter for outputting high voltage in use of CMOS transistors of low voltage, more particularly, to a circuit generating a high voltage output without subsidiary shield voltage.
2. Discussion of Related Art
An inverter circuit for outputting high voltage outputs generates a high voltage output fluctuating within high voltage range from an input signal fluctuating within low voltage range. It is all right to constitute such a circuit with transistors which can resist against high voltage. Yet, it is very difficult to constitute such a circuit for generating high voltage with transistors for low voltage.
As it is a trend to constitute semiconductor circuits with transistors operated by low voltage, it is very difficult to constitute integrated circuits with other transistors for high voltage. Therefore, circuits for high voltage are constituted by a method which prevents transistors for low voltage from being supplied with high voltage in use of both shield voltage of middle voltage to generate high voltage and some transistors operated by low voltage, i.e., the transistors(hereinafter abbreviated low voltage transistors) which fails to resist high voltage of an output voltage from a circuit.
FIG. 1 shows an example of an inverter circuit for generating high voltage outputs.
Referring to FIG. 1, shield voltage Vshield is applied to a gate terminal, drains of a second PMOS P2 and a second NMOS N2 are connected to an output terminal, input voltage INH ranging between VDD and Vshield is applied to a gate of a first PMOS P1, a source terminal of the first PMOS P1 is connected to VDD, a drain terminal of the first PMOS P1 is connected to a source of the second PMOS P2, a gate of a first NMOS N1 is supplied with input voltage INL ranging between Vshield and VSS, and a drain terminal of the first NMOS N1 is connected to the drain of the second NMOS N2. Vshield amounts to half of the voltage ranging between VDD and VSS. And, input voltage of the first PMOS ranges from Vshield to VDD while another input voltage of the first NMOS ranges between Vshield and VSS.
The operation of the inverter for outputting high voltage of the related art will be explained provided that VDD=10V, VSS=0V, Vshield=5V, INH between 10V.about.5V, INL between 5V.about.0V, and all are in the same phase. Besides, each threshold voltage of the NMOS and PMOS is supposed to be 1V.
Once INH and INL become 10V and 5V respectively, N1 becomes turned on but P1 becomes turned off. Thus a node b becomes 0V(VSS) as N1 becomes turned on. And, another node OUT becomes 0V(VSS) as N2 becomes turned on by Vshield. Besides, other node a is supplied with voltage of 6V resulted from the voltage by adding threshold voltage of P2 to Vshield as P1 is turned off.
Thus, the node a, OUT node, and node b are 6V, 0V, and 0V respectively. Therefore, the circuit generates 0V(VSS) ranging within breakdown voltage of low voltage CMOS transistors.
Otherwise, N1 and P1 become turned off and on respectively provided that INH and INL become 5V and 0V, respectively. Thus, the node a becomes 10V(VDD) as P1 becomes turned on and the OUT node becomes 10V(VDD) as P2 becomes turned on by Vshield. Moreover, as N1 is turned off, the node b is dupplied with the voltage of 4V resulted from subtracting Vshield by threshold voltage of N2.
Thus, the node a, node OUT, and node b are 10V, 10V, and 4V respectively. Therefore, the circuit generates 10V(VDD) ranging within breakdown voltage of low voltage CMOS transistors.
Accordingly, the inverter for outputting high voltage generates a high voltage output(between VDD and VSS) from an input ranging between VDD and Vshield or between Vshield and VSS within low voltage input range.
DC voltage of Vshield having about (VDD+VSS)/2 is required, as shown in FIG. 1, for generating a high voltage output. In order to make the voltage of Vshield, DC voltage is inputted from outside or a Vshield voltage generator is necessary. Therefore, reliance of the circuit is decreased as the gates of N2 and P2 are supplied with DC voltage continuously.